1. Field of the Invention
The present invention relates to apparatus and methods for generating a random number as are required, for example, in cryptographic applications, e.g. SmartCards.
2. Description of Prior Art
Random numbers are required in various fields of application. Examples are simulation, test and cryptographic applications. Especially for the latter, the use of so-called pseudo random numbers is prohibitive for security reasons. Therefore, physical random number generators are often used. These are typically based on the stochastic noise of a physical system. This presents problems particularly in that an equally distributed sequence of zeros and ones is to be generated from a random physical signal as rapidly as possible, and in that the statistical properties of a signal, in particular the probability-density function, will change over time due to external influences such as temperature or pressure. Random number generators have been known from “High Quality Physical Random Number Generator”, Markus Dichtl and Norbert Janssen, Proceedings of Eurosmart Security Conference, June 2000, Marseille, France, pages 279 to 287. A known random number generator includes an oscillator, a D-type flip-flop downstream from the oscillator and, at the output of the D-type flip-flop, a switch controlled by an oscillator with phase jitter. The oscillator with phase jitter, which controls the switch at the output of the D-type flip-flop, has, when the frequency of the oscillator is chosen to be at a certain ratio to the frequency of the oscillator with phase jitter, a state which is independent of the previous state, so that a high-quality noise signal is generated. For each actuation of the switch, a random bit is generated which may undergo post-processing and compression. For post-processing, a shift register with linear coupling may be employed.
Another random number generator is disclosed, for example, in EP 0 903 665 A2. Further information may also be found in the doctoral thesis of the Technische Universität Berlin, by R. Brederlow entitled “Niederfrequentes Rauschen in einer analogen CMOS-Schaltung” from 1999.
Due to differing hardware implementations, the random number generators known in the art exhibit different speeds. However, they all have in common that sampling of a random process generates merely one bit of a string of random numbers, from which a random number with a specific width, e.g. 8 bits, is then generated using any type of post-processing.
Frequently, random numbers are needed fast. To achieve this, sampling circuits, a noise source and control oscillators for the sampling circuits must be configured as fast devices, which may result in an increase in cost of the random number generator and also in an increased space requirement on a chip. This is disadvantageous in that the requirement of chip area is typically problematic, especially since with typical cryptographic applications, for example on SmartCards, the circuit designer is given a limited maximum chip area which may be used. This chip area is to accommodate not only the random number generator, but a CPU, possibly coprocessors and also, in particular, the memory. Generally, a large amount of memory is preferred, which results in the requirement of making the other components as small as possible. High-speed implementations for the random number generator therefore are prohibitive due to the large amount of space required and, last but not least, due to the high current consumption. The current consumption plays a particularly important role when contactless applications are considered, i.e. SmartCards which have no voltage supply of their own but are supplied with power by an RF field sent out, for example, from a terminal. It is immediately evident that in addition to the chip area, the power consumption of a circuit is also of great interest here.